LLVM API Documentation

RegAllocSimple.cpp File Reference

#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Debug.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
#include <iostream>

Include dependency graph for RegAllocSimple.cpp:

Go to the source code of this file.

Defines

#define DEBUG_TYPE "regalloc"

Functions

FunctionPass * llvm::createSimpleRegisterAllocator ()

Variables

Statistic NumStores ("ra-simple","Number of stores added")

Statistic NumLoads ("ra-simple","Number of loads added")

MachineFunction * MF

const TargetMachine * TM

const MRegisterInfo * RegInfo

bool * PhysRegsEverUsed

std::map< unsigned, int > StackSlotForVirtReg

std::vector< bool > RegsUsed

std::map< const TargetRegisterClass *,
unsigned > RegClassIdx

Define Documentation

#define DEBUG_TYPE "regalloc"

Definition at line 17 of file RegAllocSimple.cpp.

Variable Documentation

MachineFunction* MF

Definition at line 36 of file RegAllocSimple.cpp.

Statistic NumLoads("ra-simple","Number of loads added") [static]

Statistic NumStores("ra-simple","Number of stores added") [static]

bool* PhysRegsEverUsed

Definition at line 39 of file RegAllocSimple.cpp.

std::map<const TargetRegisterClass*, unsigned> RegClassIdx

Definition at line 52 of file RegAllocSimple.cpp.

const MRegisterInfo* RegInfo

Definition at line 38 of file RegAllocSimple.cpp.

std::vector<bool> RegsUsed

Definition at line 47 of file RegAllocSimple.cpp.

std::map<unsigned, int> StackSlotForVirtReg

Definition at line 43 of file RegAllocSimple.cpp.

const TargetMachine* TM

Definition at line 37 of file RegAllocSimple.cpp.


Defines
#define	DEBUG_TYPE "regalloc"
Functions
FunctionPass *	llvm::createSimpleRegisterAllocator ()
Variables
Statistic	NumStores ("ra-simple","Number of stores added")
Statistic	NumLoads ("ra-simple","Number of loads added")
MachineFunction *	MF
const TargetMachine *	TM
const MRegisterInfo *	RegInfo
bool *	PhysRegsEverUsed
std::map< unsigned, int >	StackSlotForVirtReg
std::vector< bool >	RegsUsed
std::map< const TargetRegisterClass *, unsigned >	RegClassIdx