LLVM API Documentation
#include "AlphaISelLowering.h"#include "AlphaTargetMachine.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/SelectionDAG.h"#include "llvm/CodeGen/SSARegMap.h"#include "llvm/Constants.h"#include "llvm/Function.h"#include "llvm/Module.h"#include "llvm/Support/CommandLine.h"#include <iostream>Include dependency graph for AlphaISelLowering.cpp:
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Classes | |
| struct | ms |
| struct | mu |
Functions | |
| static struct ms | magic (int64_t d) |
| static struct mu | magicu (uint64_t d) |
| static SDOperand | BuildSDIVSequence (SDOperand N, SelectionDAG *ISelDAG) |
| static SDOperand | BuildUDIVSequence (SDOperand N, SelectionDAG *ISelDAG) |
| static unsigned | AddLiveIn (MachineFunction &MF, unsigned PReg, TargetRegisterClass *RC) |
| static int | getUID () |
| static unsigned AddLiveIn | ( | MachineFunction & | MF, | |
| unsigned | PReg, | |||
| TargetRegisterClass * | RC | |||
| ) | [static] |
AddLiveIn - This helper function adds the specified physical register to the MachineFunction as a live in value. It also creates a corresponding virtual register for it.
Definition at line 177 of file AlphaISelLowering.cpp.
References llvm::MachineFunction::addLiveIn(), llvm::SSARegMap::createVirtualRegister(), llvm::MachineFunction::getSSARegMap(), MF, and RC.
Referenced by llvm::AlphaTargetLowering::LowerArguments().
| static SDOperand BuildSDIVSequence | ( | SDOperand | N, | |
| SelectionDAG * | ISelDAG | |||
| ) | [static] |
BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant, return a DAG expression to select that will generate the same value by multiplying by a magic number. See: <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Definition at line 127 of file AlphaISelLowering.cpp.
References ADD, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDOperand::getOperand(), llvm::MVT::i64, ms::m, magic(), llvm::ISD::MULHS, ms::s, llvm::ISD::SRA, llvm::ISD::SRL, SUB, and T.
Referenced by llvm::AlphaTargetLowering::LowerOperation().
| static SDOperand BuildUDIVSequence | ( | SDOperand | N, | |
| SelectionDAG * | ISelDAG | |||
| ) | [static] |
BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant, return a DAG expression to select that will generate the same value by multiplying by a magic number. See: <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Definition at line 153 of file AlphaISelLowering.cpp.
References mu::a, ADD, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDOperand::getOperand(), llvm::MVT::i64, mu::m, magicu(), llvm::ISD::MULHU, mu::s, llvm::ISD::SRL, and SUB.
Referenced by llvm::AlphaTargetLowering::LowerOperation().
| static int getUID | ( | ) | [static] |
Definition at line 509 of file AlphaISelLowering.cpp.
| static struct ms magic | ( | int64_t | d | ) | [static] |
magic - calculate the magic numbers required to codegen an integer sdiv as a sequence of multiply and shifts. Requires that the divisor not be 0, 1, or -1.
Definition at line 45 of file AlphaISelLowering.cpp.
Referenced by llvm::Archive::addFileBefore(), BuildSDIVSequence(), and llvm::ArchiveMember::replaceWith().
| static struct mu magicu | ( | uint64_t | d | ) | [static] |
magicu - calculate the magic numbers required to codegen an integer udiv as a sequence of multiply, add and shifts. Requires that the divisor not be 0.
Definition at line 84 of file AlphaISelLowering.cpp.
References mu::a, mu::m, and mu::s.
Referenced by BuildUDIVSequence().